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# Intel 80960 Dependent Features

- Options-i960: i960 Command-line Options
- Floating Point-i960: Floating Point
- Directives-i960: i960 Machine Directives
- Opcodes for i960: i960 Opcodes

## i960 Command-line Options

`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC`
  Select the 80960 architecture. Instructions or features not supported by the selected architecture cause fatal errors. ``-ACA'` is equivalent to ``-ACA_A'`; ``-AKC'` is equivalent to ``-AMC'`. Synonyms are provided for compatibility with other tools. If you do not specify any of these options, `as` generates code for any instruction or feature that is supported by some version of the 960 (even if this means mixing architectures!). In principle, `as` attempts to deduce the minimal sufficient processor type if none is specified; depending on the object code format, the processor type may be recorded in the object file. If it is critical that the `as` output match a specific architecture, specify that architecture explicitly.
`-b`
  Add code to collect information about conditional branches taken, for later optimization using branch prediction bits. (The conditional branch instructions have branch prediction bits in the CA, CB, and CC architectures.) If BR represents a conditional branch instruction, the following represents the code generated by the assembler when ``-b'` is specified:

              call    increment routine
              .word   0       # pre-counter
      Label:  BR
              call    increment routine
              .word   0       # post-counter

  The counter following a branch records the number of times that branch was not taken; the differenc between the two counters is the number of times the branch was taken. A table of every such `Label` is also generated, so that the external postprocessor `gbr960` (supplied by Intel) can locate all the counters. This table is always labelled ``__BRANCH_TABLE__'`; this is a local symbol to permit collecting statistics for many separate object files. The table is word aligned, and begins with a two-word header. The first word, initialized to 0, is used in maintaining linked lists of branch tables. The second word is a count of the number of entries in the table, which follow immediately: each is a word, pointing to one of the labels illustrated above. The first word of the header is used to locate multiple branch tables, since each object file may contain one. Normally the links are maintained with a call to an initialization routine, placed at the beginning of each function in the file. The GNU C compiler generates these calls automatically when you give it a ``-b'` option. For further details, see the documentation of ``gbr960'`.
`-no-relax`
  Normally, Compare-and-Branch instructions with targets that require displacements greater than 13 bits (or that have external targets) are replaced with the corresponding compare (or ``chkbit'`) and branch instructions. You can use the ``-no-relax'` option to specify that `as` should generate errors instead, if the target displacement is larger than 13 bits. This option does not affect the Compare-and-Jump instructions; the code emitted for them is always adjusted when necessary (depending on displacement size), regardless of whether you use ``-no-relax'`.

## Floating Point

`as` generates IEEE floating-point numbers for the directives ``.float'`, ``.double'`, ``.extended'`, and ``.single'`.

## i960 Machine Directives

`.bss symbol, length, align`
  Reserve length bytes in the bss section for a local symbol, aligned to the power of two specified by align. length and align must be positive absolute expressions. This directive differs from ``.lcomm'` only in that it permits you to specify an alignment. See section `.lcomm symbol` , length.

`.extended flonums`
  `.extended` expects zero or more flonums, separated by commas; for each flonum, ``.extended'` emits an IEEE extended-format (80-bit) floating-point number.
`.leafproc call-lab, bal-lab`
  You can use the ``.leafproc'` directive in conjunction with the optimized `callj` instruction to enable faster calls of leaf procedures. If a procedure is known to call no other procedures, you may define an entry point that skips procedure prolog code (and that does not depend on system-supplied saved context), and declare it as the bal-lab using ``.leafproc'`. If the procedure also has an entry point that goes through the normal prolog, you can specify that entry point as call-lab. A ``.leafproc'` declaration is meant for use in conjunction with the optimized call instruction ``callj'`; the directive records the data needed later to choose between converting the ``callj'` into a `bal` or a `call`. call-lab is optional; if only one argument is present, or if the two arguments are identical, the single argument is assumed to be the `bal` entry point.
`.sysproc name, index`
  The ``.sysproc'` directive defines a name for a system procedure. After you define it using ``.sysproc'`, you can use name to refer to the system procedure identified by index when calling procedures with the optimized call instruction ``callj'`. Both arguments are required; index must be between 0 and 31 (inclusive).

## i960 Opcodes

All Intel 960 machine instructions are supported; see section i960 Command-line Options for a discussion of selecting the instruction subset for a particular 960 architecture.

Some opcodes are processed beyond simply emitting a single corresponding instruction: ``callj'`, and Compare-and-Branch or Compare-and-Jump instructions with target displacements larger than 13 bits.

- callj-i960: `callj`
- Compare-and-branch-i960: Compare-and-Branch

### `callj`

You can write `callj` to have the assembler or the linker determine the most appropriate form of subroutine call: ``call'`, ``bal'`, or ``calls'`. If the assembly source contains enough information--a ``.leafproc'` or ``.sysproc'` directive defining the operand--then `as` translates the `callj`; if not, it simply emits the `callj`, leaving it for the linker to resolve.

### Compare-and-Branch

The 960 architectures provide combined Compare-and-Branch instructions that permit you to store the branch target in the lower 13 bits of the instruction word itself. However, if you specify a branch target far enough away that its address won't fit in 13 bits, the assembler can either issue an error, or convert your Compare-and-Branch instruction into separate instructions to do the compare and the branch.

Whether `as` gives an error or expands the instruction depends on two choices you can make: whether you use the ``-no-relax'` option, and whether you use a "Compare and Branch" instruction or a "Compare and Jump" instruction. The "Jump" instructions are always expanded if necessary; the "Branch" instructions are expanded when necessary unless you specify `-no-relax`---in which case `as` gives an error instead.

These are the Compare-and-Branch instructions, their "Jump" variants, and the instruction pairs they may expand into:

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