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# H8/500 Dependent Features

- H8/500 Options: Options
- H8/500 Syntax: Syntax
- H8/500 Floating Point: Floating Point
- H8/500 Directives: H8/500 Machine Directives
- H8/500 Opcodes: Opcodes

## Options

`as` has no additional command-line options for the Hitachi H8/500 family.

## Syntax

- H8/500-Chars: Special Characters
- H8/500-Regs: Register Names
- H8/500-Addressing: Addressing Modes

### Special Characters

``!'` is the line comment character.

``;'` can be used instead of a newline to separate statements.

Since ``$'` has no special meaning, you may use it in symbol names.

### Register Names

You can use the predefined symbols ``r0'`, ``r1'`, ``r2'`, ``r3'`, ``r4'`, ``r5'`, ``r6'`, and ``r7'` to refer to the H8/500 registers.

The H8/500 also has these control registers:

`cp`
  code pointer
`dp`
  data pointer
`bp`
  base pointer
`tp`
  stack top pointer
`ep`
  extra pointer
`sr`
  status register
`ccr`
  condition code register

All registers are 16 bits long. To represent 32 bit numbers, use two adjacent registers; for distant memory addresses, use one of the segment pointers (`cp` for the program counter; `dp` for `r0`--`r3`; `ep` for `r4` and `r5`; and `tp` for `r6` and `r7`.

### Addressing Modes

as understands the following addressing modes for the H8/500:

`Rn`
  Register direct
`@Rn`
  Register indirect
`@(d:8, Rn)`
  Register indirect with 8 bit signed displacement
`@(d:16, Rn)`
  Register indirect with 16 bit signed displacement
`@-Rn`
  Register indirect with pre-decrement
`@Rn+`
  Register indirect with post-increment
`@aa:8`
  8 bit absolute address
`@aa:16`
  16 bit absolute address
`#xx:8`
  8 bit immediate
`#xx:16`
  16 bit immediate

## Floating Point

The H8/500 family has no hardware floating point, but the `.float` directive generates IEEE floating-point numbers for compatibility with other development tools.

## H8/500 Machine Directives

`as` has no machine-dependent directives for the H8/500. However, on this platform the ``.int'` and ``.word'` directives generate 16-bit numbers.

## Opcodes

For detailed information on the H8/500 machine instruction set, see H8/500 Series Programming Manual (Hitachi M21T001).

`as` implements all the standard H8/500 opcodes. No additional pseudo-instructions are needed on this family.

The following table summarizes H8/500 opcodes and their operands:

    Legend:
    abs8      8-bit absolute address
    abs16     16-bit absolute address
    abs24     24-bit absolute address
    crb       ccr, br, ep, dp, tp, dp
    disp8     8-bit displacement
    ea        rn, @rn, @(d:8, rn), @(d:16, rn),
              @-rn, @rn+, @aa:8, @aa:16,
              #xx:8, #xx:16
    ea_mem    @rn, @(d:8, rn), @(d:16, rn),
              @-rn, @rn+, @aa:8, @aa:16
    ea_noimm  rn, @rn, @(d:8, rn), @(d:16, rn),
              @-rn, @rn+, @aa:8, @aa:16
    fp        r6
    imm4      4-bit immediate data
    imm8      8-bit immediate data
    imm16     16-bit immediate data
    pcrel8    8-bit offset from program counter
    pcrel16   16-bit offset from program counter
    qim       -2, -1, 1, 2
    rd        any register
    rs        a register distinct from rd
    rlist     comma-separated list of registers in parentheses;
              register ranges rd-rs are allowed
    sp        stack pointer (r7)
    sr        status register
    sz        size; `.b' or `.w'.  If omitted, default `.w'

    ldc[.b] ea,crb                 bcc[.w] pcrel16
    ldc[.w] ea,sr                  bcc[.b] pcrel8
    add[:q] sz qim,ea_noimm        bhs[.w] pcrel16
    add[:g] sz ea,rd               bhs[.b] pcrel8
    adds sz ea,rd                  bcs[.w] pcrel16
    addx sz ea,rd                  bcs[.b] pcrel8
    and sz ea,rd                   blo[.w] pcrel16
    andc[.b] imm8,crb              blo[.b] pcrel8
    andc[.w] imm16,sr              bne[.w] pcrel16
    bpt                            bne[.b] pcrel8
    bra[.w] pcrel16                beq[.w] pcrel16
    bra[.b] pcrel8                 beq[.b] pcrel8
    bt[.w] pcrel16                 bvc[.w] pcrel16
    bt[.b] pcrel8                  bvc[.b] pcrel8
    brn[.w] pcrel16                bvs[.w] pcrel16
    brn[.b] pcrel8                 bvs[.b] pcrel8
    bf[.w] pcrel16                 bpl[.w] pcrel16
    bf[.b] pcrel8                  bpl[.b] pcrel8
    bhi[.w] pcrel16                bmi[.w] pcrel16
    bhi[.b] pcrel8                 bmi[.b] pcrel8
    bls[.w] pcrel16                bge[.w] pcrel16
    bls[.b] pcrel8                 bge[.b] pcrel8
    blt[.w] pcrel16                mov[:g][.b] imm8,ea_mem
    blt[.b] pcrel8                 mov[:g][.w] imm16,ea_mem
    bgt[.w] pcrel16                movfpe[.b] ea,rd
    bgt[.b] pcrel8                 movtpe[.b] rs,ea_noimm
    ble[.w] pcrel16                mulxu sz ea,rd
    ble[.b] pcrel8                 neg sz ea
    bclr sz imm4,ea_noimm          nop
    bclr sz rs,ea_noimm            not sz ea
    bnot sz imm4,ea_noimm          or sz ea,rd
    bnot sz rs,ea_noimm            orc[.b] imm8,crb
    bset sz imm4,ea_noimm          orc[.w] imm16,sr
    bset sz rs,ea_noimm            pjmp abs24
    bsr[.b] pcrel8                 pjmp @rd
    bsr[.w] pcrel16                pjsr abs24
    btst sz imm4,ea_noimm          pjsr @rd
    btst sz rs,ea_noimm            prtd imm8
    clr sz ea                      prtd imm16
    cmp[:e][.b] imm8,rd            prts
    cmp[:i][.w] imm16,rd           rotl sz ea
    cmp[:g].b imm8,ea_noimm        rotr sz ea
    cmp[:g][.w] imm16,ea_noimm     rotxl sz ea
    Cmp[:g] sz ea,rd               rotxr sz ea
    dadd rs,rd                     rtd imm8
    divxu sz ea,rd                 rtd imm16
    dsub rs,rd                     rts
    exts[.b] rd                    scb/f rs,pcrel8
    extu[.b] rd                    scb/ne rs,pcrel8
    jmp @rd                        scb/eq rs,pcrel8
    jmp @(imm8,rd)                 shal sz ea
    jmp @(imm16,rd)                shar sz ea
    jmp abs16                      shll sz ea
    jsr @rd                        shlr sz ea
    jsr @(imm8,rd)                 sleep
    jsr @(imm16,rd)                stc[.b] crb,ea_noimm
    jsr abs16                      stc[.w] sr,ea_noimm
    ldm @sp+,(rlist)               stm (rlist),@-sp
    link fp,imm8                   sub sz ea,rd
    link fp,imm16                  subs sz ea,rd
    mov[:e][.b] imm8,rd            subx sz ea,rd
    mov[:i][.w] imm16,rd           swap[.b] rd
    mov[:l][.w] abs8,rd            tas[.b] ea
    mov[:l].b abs8,rd              trapa imm4
    mov[:s][.w] rs,abs8            trap/vs
    mov[:s].b rs,abs8              tst sz ea
    mov[:f][.w] @(disp8,fp),rd     unlk fp
    mov[:f][.w] rs,@(disp8,fp)     xch[.w] rs,rd
    mov[:f].b @(disp8,fp),rd       xor sz ea,rd
    mov[:f].b rs,@(disp8,fp)       xorc.b imm8,crb
    mov[:g] sz rs,ea_mem           xorc.w imm16,sr
    mov[:g] sz ea,rd

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